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dc.creatorBlagojević, Miloš
dc.creatorSmiljanić, Aleksandra
dc.creatorPetrović, Miloš
dc.date.accessioned2021-03-10T10:46:22Z
dc.date.available2021-03-10T10:46:22Z
dc.date.issued2007
dc.identifier.urihttp://TechnoRep.tmf.bg.ac.rs/handle/123456789/1138
dc.description.abstractHigh-capacity routers that circulate multicast packets have unique properties. Their architecture is non-blocking even for the multicast traffic. It also provides delay guarantees. This paper presents the detailed implementation of the controller that circulates multicast packets through a router toward their destination ports. The controller was implemented on the FPGA device and its functioning was tested. Its scalability and speed were assessed, and shown to be satisfactory.en
dc.publisherIEEE, New York
dc.rightsrestrictedAccess
dc.source2007 Workshop on High Performance Switching and Routing
dc.titleDesign of the multicast controller for the high-capacity Internet routeren
dc.typeconferenceObject
dc.rights.licenseARR
dc.citation.epage+
dc.citation.other: 173-+
dc.citation.spage173
dc.identifier.rcubconv_2913
dc.identifier.wos000251052500031
dc.type.versionpublishedVersion


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